


	Ms. Gosia Jurczak RRAM and DRAM Capacitor Program Director Process Technology Unit IMEC

Education:
• PhD in Electrical Engineering

Experiences:
• Memories: RRAM, FBRAM, DRAM Capacitor, NAND Flash • Logic Devices: Planar CMOS (strain Si Channels, Gate WF junction and engineering), SOI and bulk FINFET, Vertical MOS, FD SOI MOSFET • Thin Films, Integration, Device design, characterization, modelling • Editor of IEEE Electron Device Letters • Member of Technical Committees of VLSI Symposium, IEDM, VLSI TSA, ESSDERC, SOI Conferences and ITRS roadmap

Biography:
Gosia Jurczak has worked for imec for the past 15 years, initially leading the imec-Philips Joint Development Program for 90nm and 65nm CMOS and later managing a program on FINFET devices design and fabrication. Since 2008 she has been involved in developing new memory devices (RRAM, FBRAM, DRAM Capacitor and 2D-NAND Flash). Previously she worked in CMOS device design for 0.18-0.12um technology node at CNET, France Telecom and as Professor Assistant in the Faculty of Electronics at Warsaw University of Technology, Poland. She earned her PhD in electrical engineering from the Warsaw University of Technology.