Topic:
Holistic approach to meet today’s patterning challenges
Abstract:
The semiconductor roadmap is currently entering the single digit nanometer era and multiple solutions are being prepared to face the associated patterning challenges. Alongside the introduction of EUV Lithography, immersion lithography continues to be extended and the photolithography performance requirements need to be tightened to enable this continued shrink. Alongside EUV introduction and generic immersion scanner system improvements, process specific application solutions are required to enable the overlay and imaging control and tool matching. These application specific solutions require a holistic approach to meet the patterning challenges seen today. We will describe the holistic optimization flow used for the scanner, mask and patterning processes. We will describe in detail the holistic architecture that optimizes the dynamic use of higher order, field based corrections by making use of advanced actuators within the projection lens system and the wafer and reticle scanning stages. Alongside the scanner actuation we will also describe the holistic approach to utilizing on product and monitor wafer diffraction based metrology data to fully optimize the imaging and overlay control and matching of systems. We will also show how the same holistic flow can be adopted to enable EUV and immersion platform matching to simplify the EUV implementation.